By Monica Besana, Michele Borgatti (auth.), Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest, Norbert Wehn (eds.)
The evolution of digital structures is pushing conventional silicon designers into parts that require new domain names of craftsmanship. as well as the layout of complicated undefined, System-on-Chip (SoC) layout calls for software program devel- ment, working structures and new procedure architectures. destiny SoC designs will resemble a miniature on-chip allotted computing procedure combining many sorts of microprocessors, re-configurable materials, application-specific and stories, all speaking through an on-chip inter-connection community. Designing stable SoCs would require perception into those new different types of architectures, the embedded software program, and the interplay among the embedded software program, the SoC structure, and the purposes for which the SoC is designed. This ebook collects contributions from the Embedded software program discussion board of the layout, Automation and attempt in Europe convention (DATE 03) that happened in March 2003 in Munich, Germany. The good fortune of the Embedded software program discussion board at DATE displays the expanding significance of embedded software program within the layout of a System-on-Chip. Embedded software program for SoC covers all software program similar features of SoC layout Embedded and application-domain particular working platforms, interaction among software, working procedure, and structure. approach structure for destiny SoC, application-specific architectures in accordance with embedded processors and requiring refined hardware/software interfaces. Compilers and interaction among compilers and architectures. Embedded software program for purposes within the domain names of automobile, avionics, multimedia, telecom, networking, . . .
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Extra resources for Embedded Software for SoC
18% code. This results show that about 60% of injected faults changing the program’s behavior have been detected and a significant decrease of error rate (about 17 times) for the hardened application. 3. Fault injection in the data memory area When faults have been injected in the data segment area (results illustrated in Table 4-6)‚ the hardened CMA program was able to provide 100% detection efficiency.
To detect this type of error‚ we associate to each basic block in the program a boolean flag called status_block. This flag takes the value “0” if the basic block is active and “1” for the inactive state. At both the beginning and the end of each basic block‚ the value of the status_block is incremented modulo 2. In this way the value of the status_block is always “1” at the beginning of each basic block and “0” at the end of each block. If an error provokes a jump to the beginning of a wrong block (including an erroneous restarting of the currently executed block) the status_block will take the value “0” for an active block and “1” for an inactive state block.
CONCLUSION In this chapter we presented a methodology for certifiable integration of automotive software components‚ which focuses on the exchange of performance information while IP is protected. After considering conventions for RTOS configuration‚ process communication and memory budgeting‚ we focused on an unsolved core integration issue‚ namely performance validation‚ in particular the validation of timing. We presented methods for performance characterization of software functions and the RTOS which also consider caches.